Descriptions:
- The PCIe card slot identify under Riser Card and PCIe speed modification are useful if more than PCIe boards on SKY-7232D platform
- Some of the Legacy PCIe Gen3 board don't correctly work on PCIe Gen4, the workaround is to disable the Data Link Feature Exchange on PCIe Gen4 slot.
Audience
For the engineers who have experience on Advantech x86 platforms and familiar with BIOS menu option
Prerequisite:
1. SKY-7232D User Manual
2. PCIe board
Procedure:
-
Identify the PCIe board location and PCI lane from CPU0 (socket 0) or CPU1 (socket 1)
- For EX: By the picture, at the rear of SKY-7232D, the PCIe card location from CPU1 (socket 1)
-
Check Riser Card's PCIe lane,
PE4[0A-D] ---> BIOS IOU0
PE4[1A-D] ---> BIOS IOU1
PE4[2A-D] ---> BIOS IOU3
-
Riser Card Type PCIe slot mapping Rule
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Depends on the location of PCIe card under Riser Cage, from "BIOS --> Hardware --> Northbridge --> PCI express --> IOUX --> PORT XX", modify the "link speed" or "data link feature exchange" under IOUX
Below is the way to Enable/Disable the "Data Link Feature Exchange" in Port 2A & 2B under IOU3 if PCIe card on IOU3 (2A,2B) slot
Below is the way to chang "Link speed" in Port 2A & 2B under IOU3 if
f PCIe card on IOU3 (2A,2B) slot
-
BIOS --> Save & Exit --> Save Changes and Reset
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BIOS --> Save & Exit --> UEFI: Built-in EFI Shell, switch to UEFI mode
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Execute "PCI" by the Shell> prompt
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Check the PCIe card is "Vendor 1D2A Device 1000 Prog Interfacefor"
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PCIe link speed check through lspci command under Linux
[root@7232-efi ~]# lspci -n | grep -i 1D2A
8a:00.0 ff00: 1d2a:1000 (rev 07)
[root@7232-efi ~]# lspci -n -d 1d2a:1000 -vvv | grep -i width
LnkCap: Port #1, Speed 8GT/s, Width x8, ASPM not supported, Exit Latency L0s <4us, L1 <1us
LnkSta: Speed 8GT/s, Width x8, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
- On Window PowerShell mode, execute "Get-NetAdapterHardwareInfo"
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